x86: Conditionally disable PIT 100HZ timer interrupt
authorKeir Fraser <keir.fraser@citrix.com>
Thu, 10 Apr 2008 10:11:25 +0000 (11:11 +0100)
committerKeir Fraser <keir.fraser@citrix.com>
Thu, 10 Apr 2008 10:11:25 +0000 (11:11 +0100)
commit49fd7b4410989ac653894b79fcee15f60d906cec
tree351ee4855202762b5c3f27ec147ad4462e88a635
parentdacde68ff12a8f71f9e8ad6e6053a93af4bf655a
x86: Conditionally disable PIT 100HZ timer interrupt

100HZ PIT timer interrupt set a 10ms upper limit for C state
residency, which makes Xen not power friendly. This patch disable PIT
timer interrupt in the conditions:
 - CPU has APIC support, and
 - PIT is not used as platform time source

Signed-off-by: Yu Ke <ke.yu@intel.com>
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
xen/arch/x86/time.c